Not all electronics are created equal. For space applications, electronic components must comply with special requirements so they will not malfunction as a result of the harsh space environment, or even the launch conditions. In the case of Field Programmable Gate Arrays (FPGAs), particularly with SRAM-based FPGAs, Europe has always had a dependence with United States’ technology, since space-grade electronic devices may be subject to arms regulations such as ITAR o EAR.
In order to overcome this dependence of European space technology, 7 European companies and 2 European Universities form the consortium for the VEGAS project, Validation of European high capacity rad-hard FPGA and software tools, a project funded by the European Commision under the H2020 program, specifically under the Leadership in enabling and industrial technologies – Space programme, with a total funding of 3976861,25 EUR.
The partners involved in the project consortium are: NanoXplore, Universidad de Sevilla, Thales Alenia Space, Politecnico di Torino, Computadoras Redes e Ingeniería (CRISA), Airbus Defence and Space, and ST Microelectronics. Nanoxplore, the project coordinator, is a French fabless company that specializes in design and development of FPGA IP silicon cores and highly reliable FPGA devices, and provides the already manufactured device, and the internal information about the IP design for qualification and research purposes.
The VEGAS project is the continuation of a previous project, BRAVE, funded by the European Space Agency’s Technology Research Programme (TRP). The BRAVE project ended with fully functioning prototypes of the medium-capacity, high-performance, radiation-hardened re-programmable European FPGA (NG-MEDIUM), which corresponds to a Technology Readiness Level (TRL) of 5 in the ISO standard 16290 scale.
But components with a TRL of just 5 cannot be used for critical systems in space missions. Before the new devices can be used in space missions, they must be fully tested and qualified for the space environment. This qualification requires many tests on extreme temperature and ionizing radiation conditions, performed according to the European Cooperation for Space Standardization (ESCC) rules. The VEGAS project’s main objective is to validate this first European 65nm rad-hard SRAM FPGA to reach a Technology Readiness Level of 7, which would demonstrate that the device can operate without problem in the space environment.
Contributions from the academic partners include technological simulation, radiation pre-testing, robustness-aware routing algorithms and the development of an FT-Unshades fault injection platform specifically for the NG-MEDIUM FPGA.
After the VEGAS project finishes on December 2018, Europe will have its own rad-hard SRAM FPGA for space applications, without import restrictions or external dependence.
For enquiries about the NG-MEDIUM SRAM FPGA please contact:
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Article by Hipólito Guzmán-Miranda, Associate Professor at Universidad de Sevilla and Edouard Lepape, Head of Business Development and CFO at NanoXplore.